ASIC Design, DSP jobs, Board level design,


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Posted by on January 24, 19103 at 05:46:24:

MUHAMMAD SHAHZAD

OBJECTIVE
To be a part of a vibrant and dynamic organization where my theoretical and practical knowledge can impart some leading role.

PERSONAL INFORMATION
Date of Birth: 23RD March 1981 Permanent Address: Flat No. 31/8 Palmer Lines Near Transit Camp Rawalpindi.
E-Mail: shahzad_engg@hotmail.com Phone No: +92-561-32287-263

EDUCATION
1999 - 2002 BE College Of E&ME, CGPA: 3.214
(Computer System) National University of
Sciences & Technology (NUST)

MAJOR PROJECTS
1 Implementation of Third Generation Mobile systems using CDMA 2000
2 Real Time Protocol Implementation in C++
3 Physical Layer of CDMA2000 in Matlab and Verilog
4 DC Motor Controller
5 Huffman’s Coding and Decoding Implemented in C++
6 Convolutional encoder and Viterbi decoder using Verilog
7 Software for Result compilation of the College departments in C Language
8 Sensor Controlling System

MAJOR SUBJECTS
1 Digital System Design
2 Integrated Circuits
3 Digital Signal Processing
4 Digital Communication
5 Microprocessor based Design
6 Integrated Services over Packet network
7 Computer Networks
8 Electronics 1
9 Digital Logic and State Machine design
10 Advanced Programming Languages
11 Operating Systems
13 Data Structures
14 Computer Architecture
15 Signal and Systems

COMPUTER AND HARDWARE SKILLS
C/C++, MATLAB, VC++, Assembly language.
Verilog Programming, Protel, Micro Soft Visio, Verilogger
Comfortable with MS Office (MSWord, Excel and Power Point).


TECHNICAL EXPERIENCE
May 2001 to July 2001 Internship with INSTAPHONE Pakistan
June 2002 to date Design Engineer
Working with Avaz Networks (formerly Enabling Technologies ‘ET’ ) on deputation from Advanced Engineering Research Organization (AERO)

RESPOSIBILITIES
1. Hardware design at component level and system level for different applications including Universal Gateway Design, Analog Trunk Interface Board, Subscriber Line Interface Board, Digital Data Interface Board and Back Plane Board.
2. Interfacing with different telephony buses like H.100, T1/E1 and Digital PCM, FPGA.
3. Worked with different SLICs, PCM codecs, T1/E1 framer and Time space switches.
4. Worked on processor of Motorola series.

REFERENCES
Dr. Muhammad Younis Javed (HOD CE E&ME).
Dr. Ismail Shah.








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