Posted by on November 26, 1999 at 07:40:27:
Dallas, USA
Texas Instruments has always led the field in the development of the electronics that have transformed everyone's lives and are the world leader in Digital Signal Processing Solutions. DSPS, used heavily in wireless communication and hard-disk drives is a major technology fuelling growth in new applications such as internet appliances, TV set-top boxes and cameras.
To continue to innovate, Texas Instruments need engineers that are the best in their field and they offer an opportunity to play an active role in designing the future of electronics and in turn shape the way that people live in the future.
Responsibilities:
Definition, development, delivery & support of mixed-signal silicon technologies & process delivery kits (PDK's)
Develop & support device-level design libraries, verification decks pattern generation extracts, sample layouts, p-cells, & test die for advanced mixed-signal semiconductor process technologies. (We refer to these libraries as process delivery kits or PDK's)
Improve procedures & techniques used to develop these libraries to improve library quality & cycle time
Test Die Definition & Development: Define requirements & specifications for complex test die used for process & component development & characterization; supervise & contribute to module definition, design, layout, QC, & documentation
Track progress of test die through design, fabrication, characterization, & SPICE modeling
Prepare SPICE modeling job requests
Define process technology coding standards
Develop sample layout library with component designers & design team for use in test die design & verification deck QC
Pattern generation/Verification Deck Development: Develop & support integrated pattern generation (WPG), design rule (DRC/DV), & layout versus schematic (LVS/SV) descriptions (rulesets) used with verification software (TIVER) to check that integrated circuit (IC) physical layout meets applicable design rules & correctly represents schematic design. Develop regression tests & other QC tools for verifying deck quality
Parasitic Extraction Development: Develop rules that extract parasitic device information from IC layout
Process Technology & PDK Documentation
Contribute to development of process technology & PDK documentation (design manuals, PDK release notes, & intranet pages) that supports WWW use of MSP process technologies; perform QC of PDK deliverables
Ensure that productization deliverables are error free & meet requirements of product development teams. CMOS or BiCMOS IC analog/mixed-signal circuit design & layout. Cadence IC design tools & analog/mixed-signal flows: schematics, component layout, circuit layout, simulation, verification, & tape-out. Analog component & circuit characterization, test die definition, development & documentation.
Skills required:
Technical communications (writing, presentations)
Business communications (business planning)
Technology specifics of assigned process technology
PDK methodology
Must be able to work well within team environment
RF or high performance bipolar experience.