Posted by on February 02, 19102 at 12:05:56:
The Company is a technology leader in electronic
design automation (EDA), providing software and
hardware design solutions that enable companies to
send better electronic products to market faster and
more cost-effectively. The company offers innovative
products and solutions that help engineers overcome
the design challenges they face in the increasingly
complex worlds of board and chip design -where deep
submicron (DSM) technology and System-on-Chip (SoC)
design multiply the challenge of getting great product
ideas to market.
Global distribution channel - sites in 55 locations
worldwide.
They are area of focus is System-on-Chip
Verification, HDL and FPGA Design, Physical Design
and Analysis, Board and System Design.
Job Desc:
Skill Sets: Verilog, VHDL, ASIC Flow,
Synthesis(PC/Mentor/ Cadence), Programming Basic
(C,C++), Scripting Language(Perl/Unix/Shell/C/Kernel),
DFT basics and knowledge.
Experience in Layout verification tools, in the area
of Standard and gate array cell design, knowledge of
Logic design, layout and timing analysis. Knowledge of
HSPICE simulation, ASIC design and hardware modeling.
Experience in releases, builds, validation of tools
methodologies. Should be able to handle teams,
management including technical and general.
Qualification: B.Tech/M.Tech/PhD in
Electronics/Microelectronics/Computer Science(one
degree should be electronics)
Experience - 3 or more years