Posted by on April 16, 19102 at 22:01:53:

HIGHLIGHTS OF QUALIFICATIONS

· Highly skillful software engineering professional in the wireless micro-controller-based system design with more than 6 years experience working with multinational and small R&D corporations.

· Well versed in embedded software development process, issues and tools (C, C++, assembly) and digital hardware.

· Exposure in the SEI CMM level-5 software development process.

EDUCATION AND TRAINING

University of Technology of Malaysia
Currently pursuing MS in Computer Science with specialization in Real Time Software Engineering.
Project: On-board automation control system.
Courses: C, Unix and system design, OO design with C++, real-time system, concurrency, specification and design.

2 days course on TCP/IP and SNMP on Microsoft Windows
5 days course on Java programming with hands-on

University of Nebraska, Lincoln, NE, USA.
May 1993 - BS in Electrical Engineering (Electronics/VLSI)

PROFESSIONAL AFFILIATION

Graduate Engineer with the Board of Engineers of Malaysia (BEM) and Institution of Engineers of Malaysia (IEM)
IEM Information Technology Special Interest Group (ITSIG) committee member

EMPLOYMENT EXPERIENCE

October 2000 – present
Motorola Multimedia Sdn Bhd, PJ, Malaysia
Senior Software Development Engineer

Team member of 5 software engineers developing Short Messaging Service (SMS) firmware for MOTOROLA handheld phone (iDEN)

· Enhancement work for SMS. Did requirement gathering, analysis and project planning. Coding, software integration and system testing.

· Developed SMS firmware that interfaced with PC application to control and test the hand-phone SMS capability. Completed 1 month ahead of schedule.

· Led a group of 4 software engineers doing C code compaction for the Motorola iDEN handheld phone. Managed to reduce the code size by 2 percent.

Team member of 20 engineers developing 3rd Generation Wireless Network Element Management System. Designed the user interface system that processes user commands and network device responses. Employed C++ on Sun Solaris UNIX with Rational Rose development environment.

Acted as a customer support for the above product. Handled customer requests (setup and installation, usage and bug fixing).

Experienced in SEI CMM level-5 comprehensive software development process organization – proper planning process, constantly improving practices and complete software development documentations.

December 1997 – October 2000
Sapura Thomson Radiocommunications Sdn Bhd, Kuala Lumpur, Malaysia
Senior Software Design Engineer

Team member of 5 software engineers in an R&D environment developing firmware and hardware for 2-way digital radio designed for military use.

· Defined the digital communication protocol specification.
· Implemented secure digital communication mode - "Skipping Frequency".
· Developed digital communication protocol software layer.
· Developed device driver software for digital and analog IC components.
· Improved existing device driver for new hardware configurations.
· RF synthesizer programming optimization.

Worked with the hardware engineers in designing, developing, and optimizing hardware components functionalities – 16-bit micro-controller, audio processor, ASIC, DTMF, CTCSS tone generator and receiver, cipher chip, SPI and I2C serial busses.

Did software system level studies (real-time issues like thread priorities and multitasking, firmware testability, hardware self-test).

Involved in the software development process from requirement analysis, schedule, development, testing and configuration management.

Familiarity: oscilloscope, logic analyzer, radio communication tester and In-Circuit Emulator. Software platform: RTOS, Hi-Cross C, assembly.

July 1993 - November 1997
Intel Design Center, Penang, Malaysia
VLSI Design Engineer

· Led a group of 4 engineers developing test programs to uncover design bugs and to improve chip testability to 99.9% for various versions of Intel 196KX micro-controllers.
· Redesigned ROM module size from 48K to 64K bytes to meet customer needs.
· Team member in the design validation of Intel i960 embedded processor.
· Supervised chip layout work.

Familiarity: Intel 16-bits micro-controller architecture, Synopsis VHDL tools, logic simulation tools (System Science), circuit simulation tools, Unix system and assembly language.