Posted by on July 18, 19103 at 02:44:39:

RESUME

R.Dhanabal.

5/108, Bharathi nagar, Email: dhanabal@india.com
N,kuttappattu(P.o), dhanabal@engineer.com
Trichy, Phone :( 0431 )- 2690999.
Pincode-620009.

Date of Birth: 14/07/79.

Technical Qualifications

SASTRA University, Tanjore

Degree : M.Tech.,
Specialization : VLSI Design.
GPA : 7.4.

Bharathidasan University, Trichy

Institution : JJ College of engg. & technology.
Degree : B.E.,
Specialization : Electronics & Communication.
Percentage : 68.
Period : 1997 to 2001.

Area of Interest

Digital CMOS VLSI Design.
Embedded Systems.
PC Assembling.

Computer Skills
HDL : VHDL and Verilog .
High-Level Languages : C and VB .
RTOS : Introduction to pSOS,RTX51,
VxWorks
Os : win 9x,win xp,win me,win
NT.,linux,unix,sun Solaris.
Tools known : xilinx,cadence,modelsim.
Synergy,verilogXL(backend tool).

Projects Done in BE degree

? ?ELECTRONIC TANKLEVEL MONITORING SYSTEM?
A digital system to monitor liquid level in tanks (For home use, intelligent control of motor, based on changes in liquid level also incorporated) is designed.

A PC based project for computerized liquid level monitoring in tanks, with a good GUI (coded in C). An improvement over the electronic version mentioned previously.

? ?ELECTRONIC IRRIGATION SYSTEM?
A digital system for automatic irrigation brief description: A large area of cultivated land is divided into several sectors and each sector is monitored for appreciable changes in moisture level. The system also introduces an innovative idea of deploying pump-out motors during flood

A PC based project for computerized irrigation, with good GUI (coded in C). This system has appreciable features like high flexibility.

(All projects mentioned above are my original designs.)

Projects Done in M.Tech degree

Comparison study of ASIC and FPGA based design of Encryption and decryption key generator circuit for Indian Telephone Industries (Defense Project).

A chip capable of generating 2 71 non repetitive key for encryption and decryption circuit using primitive polynomials & LFSR circuits is designed in ASIC and FPGA and a software model is also designed in c language for checking the results.

Elective Chosen

During under graduate course are

Computer Networks,
Radar Systems,
Biomedical Instruments.

During post graduate course are

DSP Structures for VLSI,
Analog VLSI,
DSP Architectures,
Embedded Systems.

Experience
I have teaching experience in shanmughanathan engineering college. I have handled Electronic
Devices & Digital Systems papers.

Career Objectives:

I believe that the phrase ?Hard work with a smile? would best describe me. I aim for a job that would make the most of my skills as I want to be appreciated as a person of accomplishment ? a person who excels eclipses, surpasses, shines and stands out in the crowd.

Declaration:
I hereby assure that all the information furnished above is true to the best of my knowledge.

Yours Sincerely,
Station: Trichy.

Date :
(R .Dhanabal.)